datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

CDP1854A3 View Datasheet(PDF) - Intersil

Part Name
Description
View to exact match
CDP1854A3 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CDP1854A/3, CDP1854AC/3
Dynamic Electrical Specifications tR, tF = 15ns, VIH = VDD, VIL = VSS, CL = 100pF, (See Figure 5)
PARAMETER
VDD
(V)
LIMITS
-55oC, +25oC
+125oC
MIN
MAX
MIN
MAX
INTERFACE TIMING - MODE 0
Pulse Width
CRL
tCRL
5
105
-
125
-
10
55
-
65
-
MR
tMR
5
340
-
385
-
10
160
-
175
-
Setup Time
Control Word to CRL
tCWC
5
80
-
85
-
10
40
-
60
-
Hold Time
Control Word after CRL
tCCW
5
65
-
65
-
10
45
-
45
-
Propagation Delay Time
SFD High to SOD
tSFDH
5
10
-
175
-
195
-
105
-
115
SFD Low to SOD
tSFDL
5
165
-
195
-
10
90
-
105
-
RRD High to Receiver Register
High Impedance
tRRDH
5
10
-
185
-
205
-
110
-
130
RRD Low to Receiver Register Active
tRRDL
5
165
-
195
-
10
90
-
105
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CONTROL INPUT WORD TIMING
CONTROL WORD INPUT
CONTROL WORD BYTE
tCWC
CRL
tCRL
STATUS OUTPUT TIMING
STATUS OUTPUTS
SFD
tSFDH
tCCW
tSFDL
RECEIVER REGISTER DISCONNECT TIMING
R BUS 0
R BUS 7
tRRDH
RRD
FIGURE 5. MODE 0 INTERFACE TIMING DIAGRAM
tRRDL
8

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]