PD45128163G5-A10LI-9JF View Datasheet(PDF) - Elpida Memory, Inc

Part Name

Description

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PD45128163G5-A10LI-9JF

128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Elpida Memory, Inc 

µPD45128441-I, 45128841-I, 45128163-I

10.2 Write with Auto Precharge

During a write cycle, the auto precharge starts at the timing that is equal to the value of the tDPL (MIN.) after the last

data word input to the device.

Burst length = 4

T0

T1

T2

T3

T4

T5

T6

T7

T8

CLK

/CAS latency = 2

Command

DQ

/CAS latency = 3

Command

DQ

WRITA B

DB1

DB2

DB3

Auto precharge starts

DB4

tDPL(MIN.)

Hi-Z

WRITA B

DB1

DB2

DB3

Auto precharge starts

DB4

tDPL(MIN.)

Hi-Z

(tRAS must be satisfied)

Remark WRITA means Write with Auto Precharge

In summary, the auto precharge begins relative to a reference clock that indicates the last data word is valid.

In the table below, minus means clocks before the reference; plus means after the reference.

/CAS latency

2

3

Read

–1

–2

Write

+tDPL (MIN.)

+tDPL (MIN.)

Preliminary Data Sheet E0233N10

27

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