CS5127GDWR16 View Datasheet(PDF) - Cherry semiconductor

Part Name

Description

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CS5127GDWR16

Dual Output Nonsynchronous Buck Controller with Sync Function and Second Channel Enable

Cherry semiconductor 

PACKAGE LEAD #

16 Lead SO Wide

1

LEAD SYMBOL

SYNC

2

CT

3

RT

4

VFB1

5

COMP1

6

VFFB1

7

GATE1

8

LGND

9

PGND

10

GATE2

11

VFFB2

12

COMP2

13

VFB2

14

ENABLE

15

VREF

16

VIN

Package Lead Description

FUNCTION

A pulse train on this lead will synchronize the oscillator. Sync threshold level

is 2.4V. Synchronization frequency should be at least 10% higher than the reg-

ular operating frequency. The sync feature is level sensitive.

The oscillator integrating capacitor is connected to this lead.

The oscillator charge current setting resistor is connected to this lead.

The inverting input of the channel 1 error amplifier is brought out to this lead.

The lead is connected to a resistor divider which provides a measure of the

output voltage. The input is compared to a 1.275V reference, and channel 1

error amp output is used as the V2ª PWM control voltage.

Channel 1 error amp output and PWM comparator input.

This lead connects to the non-inverting input of the channel 1 PWM comparator.

This lead is the gate driver for the channel 1 FET. It is capable of providing

nearly 1A of peak current.

This lead provides a ÒquietÓ ground for low power circuitry in the IC. This

lead should be shorted to the PGND lead as close as possible to the IC for best

operating results.

This lead is the power ground. It provides the return path for the FET gate dis-

charge. It should be shorted to the LGND lead as close as possible to the IC for

best operating results.

This lead is the gate driver for the channel 2 FET. See GATE1 lead description

for more details.

This lead connects to the non-inverting input of the channel 2 PWM comparator.

Channel 2 error amp output and PWM comparator input.

Inverting input for the channel 2 error amp. See VFBI for more details.

The regulator controlled by channel 2 may be turned on and off selectively by

the user. Pulling the ENABLE lead above 3.5V will turn channel 2 on. Setting

the ENABLE lead voltage below 1.5V guarantees that channel 2 is off.

This lead is the output of a ± 3% reference. This reference drives most of the

on-chip circuitry, but will provide a minimum of 10 mA to external circuitry if

needed. The reference is inherently stable and does not require a compensa-

tion capacitor, but use of a decoupling capacitor will reduce noise in the IC.

This lead is the power supply input to the IC. The maximum input voltage

that can be withstood without damage to the IC is 20V.

4

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