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M5M29FB800FP View Datasheet(PDF) - MITSUBISHI ELECTRIC

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M5M29FB800FP Datasheet PDF : 14 Pages
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MITSUBISHI LSIs
M5M29FB/T800FP,VP,RV-80,-10,-12
8,388,608-BIT (1048,576-WORD BY 8-BIT / 524,288-WORD BY16-BIT)
CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY
AC ELECTRICAL CHARACTERISTICS (Ta = 0 ~ 70°C, Vcc = 3.3V±0.3V)
Write Mode (/CE control)
Symbol
Parameter
Limits
M5M29FB/T800-80 M5M29FB/T800-10 M5M29FB/T800-12 Unit
Min Typ Max Min Typ Max Min Typ Max
tWC tAVAV Write cycle time
80
100
120
ns
tAS tAVEH Address set-up time
50
50
50
ns
tAH tEHAX Address hold time
10
10
10
ns
tDS tDVEH Data set-up time
50
50
50
ns
tDH tEHDX Data hold time
10
10
10
ns
tWS tWLEL Write enable set-up time
0
0
0
ns
tWH tEHWH Write enable hold time
0
0
0
ns
tCEP tELEH /CE pulse width
60
60
60
ns
tCEPH tEHEL /CE pulse width high
20
20
20
ns
tBS tFL/HEH Byte enable high or low set-up time
50
tBH tEHFL/H Byte enable high or low hold time
80
50
50
ns
100
120
ns
tBLS
tWPS
tPHHEH
Block Lock set-up to write enable high
80
100
120
ns
tBLH tQVPH Block Lockhold from valid SRD
0
tWPH
0
0
ns
tDAP tEHRH1 Duration of auto-program operation
7.5 120
7.5 120
7.5 120 ms
tDAE tEHRH2 Duration of auto-block erase operation
50 600
50 600
50 600 ms
tEHRL tEHRL /CE enable high to RY/BY low
80
100
120 ns
tPS tPHEL /RP high recovery to write enable low 500
500
500
ns
Read timing parameters during command write operations mode are the same as during read-only operations mode.
Typical values at Vcc=3.3V, Ta=25°C
Erase and Program Performance
Parameter
Block Erase Time
Main Block Write Time (Page Mode)
Page Write Time
Min
Typ
Max
Unit
50
600
ms
1.9
3.8
sec
7.5
120
ms
Vcc Power Up / Down Timing
Symbol
Parameter
Min
Typ
Max
Unit
tVCS
/RP =VIH set-up time from Vccmin
2
µs
During power up/down, by the noise pulses on control pins, the device has possibility of accidental erasure or programming.
The device must be protected against initiation of write cycle for memory contens during power up/down.
The delay time of min.2µsec is always required before read operation or write operation is initiated from the time Vcc reaches
Vccmin during power up/down. By holding /RP VIL, the contens of memory is protected during Vcc power up/down.
During power up, /RP must be held VIL for min.2µs from the time Vcc reaches Vccmin.
During power down, /RP must be held VIL until Vcc reaches GND.
/RP doesn't have latch mode ,so /RP must be held VIH during read operation or erase/program operation.
8
May 1997 , Rev.6.1

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