EDS1232AATA-75MI View Datasheet(PDF) - Elpida Memory, Inc

Part Name

Description

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EDS1232AATA-75MI

128M bits SDRAM WTR (Wide Temperature Range)

Elpida Memory, Inc 

EDS1232AATA-MI

Self refresh entry command (/CS, /RAS, /CAS, CKE = Low, /WE = High)

After the command execution, self refresh operation continues while CKE remains low. When CKE goes high, the

Synchronous DRAM exits the self refresh mode. During self refresh mode, refresh interval and refresh operation are

performed internally, so there is no need for external control. Before executing self refresh, all banks must be

precharged.

CLK

CKE

/CS

/RAS

/CAS

/WE

E BA0, BA1

(Bank select)

A10

Add

O Self Refresh Entry Command

Burst stop command (/CS = /WE = Low, /RAS, /CAS = High)

This command can stop the current burst operation.

L CLK

CKE H

/CS

/RAS

/CAS

P/WE

BA0, BA1

(Bank select)

A10

rAdd

Burst Stop Command in Full Page Mode

o No operation (/CS = Low, /RAS, /CAS, /WE = High)

This command is not an execution command. No operations begin or terminate by this command.

CLK

d CKE H

/CS

/RAS

u /CAS

/WE

BA0, BA1

(Bank select)

c A10

Add

t No Operation

Data Sheet E0340E30 (Ver. 3.0)

14

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