HEF4015B View Datasheet(PDF) - NXP Semiconductors.
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HEF4015B Datasheet PDF : 15 Pages
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NXP Semiconductors
HEF4015B
Dual 4-bit static shift register
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDD
IIK
VI
IOK
II/O
IDD
Tstg
Tamb
Ptot
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
Tamb = 40 C to +85 C
DIP16 package
SO16 package
P
power dissipation
per output
Min
0.5
-
0.5
-
-
-
65
40
[1] -
[2] -
-
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
9. Recommended operating conditions
Max
Unit
+18
V
10
mA
VDD + 0.5 V
10
mA
10
mA
50
mA
+150
C
+85
C
750
mW
500
mW
100
mW
Table 5.
Symbol
VDD
VI
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
ambient temperature
in free air
input transition rise and fall rate
VDD = 5 V
VDD = 10 V
VDD = 15 V
Min Typ Max
3
-
15
0
-
VDD
40 -
+85
-
-
3.75
-
-
0.5
-
-
0.08
Unit
V
V
C
s/V
s/V
s/V
HEF4015B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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