HEF4015B View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
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HEF4015B Datasheet PDF : 15 Pages
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NXP Semiconductors
HEF4015B
Dual 4-bit static shift register
6. Pinning information
6.1 Pinning
Fig 3. Pin configuration
HEF4015B
2CP 1
2Q3 2
1Q2 3
1Q1 4
1Q0 5
1MR 6
1D 7
VSS 8
16 VDD
15 2D
14 2MR
13 2Q0
12 2Q1
11 2Q2
10 1Q3
9 1CP
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6.2 Pin description
Table 2. Pin description
Symbol
Pin
1Q0 to 1Q3
5, 4, 3, 10
2Q0 to 2Q3;
13, 12, 11, 2
1MR, 2MR
6, 14
1D, 2D
7, 15
VSS
8
1CP, 2CP
9, 1
VDD
16
7. Functional description
Description
parallel output
parallel output
master reset input (active HIGH)
serial data input
ground supply voltage
clock input (LOW-to-HIGH edge-triggered)
supply voltage
Table 3. Function table [1]
number of clock Input
pulse transitions CP
D
1
D1
2
D2
3
D3
4
D4
X
X
X
Output
MR
Q0
Q1
L
D1
X
L
D2
D1
L
D3
D2
L
D4
D3
L
no change no change
H
L
L
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Dn = either HIGH or LOW;
= positive-going transition; = negative-going transition.
HEF4015B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 21 November 2011
Q2
X
X
D1
D2
no change
L
Q3
X
X
X
D1
no change
L
© NXP B.V. 2011. All rights reserved.
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