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SI1141(2011) View Datasheet(PDF) - Silicon Laboratories

Part Name
Description
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SI1141
(Rev.:2011)
Silabs
Silicon Laboratories Silabs
SI1141 Datasheet PDF : 66 Pages
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Si1141/42/43
Table 3. Performance Characteristics1 (Continued)
Parameter
Symbol
Conditions
Min Typ Max Units
LED1, LED2, LED3
Active Current
ILEDx
Actively Measuring Time3
VDD = 3.3 V, single drive
VLEDn = 1 V, PS_LEDn = 0001
VLEDn = 1 V, PS_LEDn = 0010
VLEDn = 1 V, PS_LEDn = 0011
VLEDn = 1 V, PS_LEDn = 0100
VLEDn = 1 V, PS_LEDn = 0101
VLEDn = 1 V, PS_LEDn = 0110
VLEDn = 1 V, PS_LEDn = 0111
VLEDn = 1 V, PS_LEDn = 1000
VLEDn = 1 V, PS_LEDn = 1001
VLEDn = 1 V, PS_LEDn = 1010
VLEDn = 1 V, PS_LEDn = 1011
VLEDn = 1 V, PS_LEDn = 1100
VLEDn = 1 V, PS_LEDn = 1101
VLEDn = 1 V, PS_LEDn = 1110
VLEDn = 1 V, PS_LEDn = 1111
Single PS
ALS VIS + ALS IR
Two ALS plus three PS
— 5.6
TBD
— 11.2 TBD
— 22.4 TBD
— 45
TBD
— 67
TBD
— 90
TBD
— 112
— 135
TBD
TBD
mA
— 157 TBD
— 180 TBD
— 202 TBD
— 224 TBD
— 269 TBD
— 314 TBD
— 359 TBD
— 155 TBD
µs
— 285 TBD
µs
— 660 TBD
µs
PS Min Detectable
Reflectance Input4
EMIN
VDD = 3.3 V
= 850 nm
— 0.1
1
µW/
cm2
PS Max Detectable
Reflectance Input
ALS Range5
EMAX
VDD = 3.3 V
= 850 nm
25 —
10m —
128k
mW/
cm2
lx
ALS Flicker Noise Error
VDD = 3.3 V
— ±5
%
SCL, SDA, INT Output
Low Voltage
VOL
I = 4 mA, VDD > 2.0 V
I = 4 mA, VDD < 2.0 V
— VDDx0.2 V
——
0.4
V
Notes:
1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx.
2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply
and voltage drop allow the driver to saturate and current regulation is lost.
3. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes.
Assumes default settings.
4. Applies to single 25.6 µs pulse measurement. By increasing irLED pulse width, 0.001 µW/cm2 under low light is
possible.
5. ALS Sensitivity under low light conditions can be improved by increasing ADC integration time. 10 mlx resolution
possible under the highest ADC integration time setting.
6
Preliminary Rev. 0.5

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