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M27C2001-70F1(1995) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
View to exact match
M27C2001-70F1
(Rev.:1995)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M27C2001-70F1 Datasheet PDF : 14 Pages
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Figure 6. Programming and Verify Modes AC Waveforms
M27C2001
A0-A17
Q0-Q7
VPP
VCC
E
P
G
tAVPL
DATA IN
tQVPL
tVPHPL
tVCHPL
tELPL
tPLPH
VALID
tPHQX
DATA OUT
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
AI00720
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer :
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at the
output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
between VCC and VSS for every eight devices. The
bulk capacitor should be located near the power
supply connection point.The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C2001 are in the ”1”
state. Data is introduced by selectively program-
ming ”0s” into the desired bit locations. Although
only ”0s” will be programmed, both ”1s” and ”0s”
can be present in the data word. The only way to
change a ”0” to a ”1” is by die exposition to ultra-
violet light (UV EPROM). The M27C2001 is in the
programming mode when VPP input is at 12.75V,
and E and P are at TTL-low. The data to be pro-
grammed is applied 8 bits in parallel to the data
output pins. The levels required for the address and
data inputs are TTL. VCC is specified to be 6.25V
± 0.25V.
7/14

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