IDT7282L20PA View Datasheet(PDF) - Integrated Device Technology

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Description

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IDT7282L20PA

CMOS dual asynchronous FIFO dual 256 x 9, dual 512 x 9, dual 1024 x 9

Integrated Device Technology 

IDT7280/7281/7282 CMOS DUAL ASYNCHRONOUS FIFO

DUAL 256 x 9, DUAL 512 x 9 and DUAL 1K x 9

(HALF–FULL FLAG) (HF)

WRITE (W)

9

DATA IN (D)

FULL FLAG (FF)

RESET (RS)

FIFO

A or B

9

IDT

7280/

7281/

7282

PRELIMINARY INFORMATION

COMMERCIAL TEMPERATURE RANGE

READ (R)

DATA OUT (Q)

EMPTY FLAG (EF)

RETRANSMIT (RT)

EXPANSION IN (XI)

3208 drw 14

Figure 12. Block Diagram of One 256/512/1024 x 9 FIFO Used in Single Device Mode

18 9

DATAIN (D)

WRITE (W)

FULL FLAG (FFA)

RESET (RS)

HFA

FIFO A

9

HFB

FIFO B

9

READ (R)

EMPTY FLAG (EFB)

RETRANSMIT (RT)

7280/7281/7282

XIA

9

XIB

18

DATAOUT (Q)

3208 drw 15

Figure 13. Block Diagram of 256/512/1024 x 18 FIFO Memory Used in Width Expansion Mode

TABLE I—RESET AND RETRANSMIT

Single Device Configuration/Width Expansion Mode

Mode

Reset

Retransmit

Read/Write

Inputs

RS

RT

XI

0

X

0

1

0

0

1

1

0

NOTE:

1. Pointer will increment if flag is High.

Internal Status

Read Pointer

Write Pointer

Location Zero

Location Zero

Location Zero

Increment(1)

Unchanged

Increment(1)

Outputs

EF

FF

0

1

X

X

X

X

HF

1

X

X

2679 tbl 09

TABLE II—RESET AND FIRST LOAD TRUTH TABLE

Depth Expansion/Compound Expansion Mode

Mode

Inputs

Internal Status

RS

FL

XI

Read Pointer

Write Pointer

Reset First Device

0

0

(1)

Location Zero

Location Zero

Reset All Other Devices

0

1

(1)

Location Zero

Location Zero

Read/Write

1

X

(1)

X

X

Outputs

EF

FF

0

1

0

1

X

X

NOTE:

2679 tbl 10

1. XI is connected to XO of previous device. See Figure 14. RS = Reset Input, FL/RT = First Load/Retransmit, EF = Empty Flag Output, FF = Flag Full Output,

XI = Expansion Input, HF = Half-Full Flag Output

5.07

9

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