IDT7282L20PA View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

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IDT7282L20PA

CMOS dual asynchronous FIFO dual 256 x 9, dual 512 x 9, dual 1024 x 9

Integrated Device Technology 

IDT7280/7281/7282 CMOS DUAL ASYNCHRONOUS FIFO

DUAL 256 x 9, DUAL 512 x 9 and DUAL 1K x 9

PRELIMINARY INFORMATION

COMMERCIAL TEMPERATURE RANGE

AC ELECTRICAL CHARACTERISTICS(1)

(Commercial: VCC = 5.0V±10%, TA = 0°C to +70°C)

Commercial

7280L15

7281L15

7282L15

7280L20

7281L20

7282L20

7280L25

7281L25

7282L25

Symbol Parameter

Min.

Max.

Min.

Max.

Min.

Max.

tS

Shift Frequency

—

40

—

33.3

—

28.5

tRC

Read Cycle Time

25

—

30

—

35

—

tA

Access Time

—

15

—

20

—

25

tRR

Read Recovery Time

10

—

10

—

10

—

tRPW Read Pulse Width(2)

15

—

20

—

25

—

tRLZ

Read Pulse Low to Data Bus at Low Z(3)

5

—

5

—

5

—

tWLZ Write Pulse High to Data Bus at Low Z(3, 4)

5

—

5

—

5

—

tDV

Data Valid from Read Pulse High

5

—

5

—

5

—

tRHZ

Read Pulse High to Data Bus at High Z(3)

—

15

—

15

—

18

tWC

tWPW

Write Cycle Time

Write Pulse Width(2)

25

—

30

—

35

—

15

—

20

—

25

—

tWR

Write Recovery Time

10

—

10

—

10

—

tDS

Data Set-up Time

11

—

12

—

15

—

tDH

Data Hold Time

0

—

0

—

0

—

tRSC

tRS

tRSS

Reset Cycle Time

Reset Pulse Width(2)

Reset Set-up Time(3)

25

—

30

—

35

—

15

—

20

—

25

—

15

—

20

—

25

—

tRSR Reset Recovery Time

10

—

10

—

10

—

tRTC Retransmit Cycle Time

tRT

Retransmit Pulse Width(2)

tRTS

Retransmit Set-up Time(3)

25

—

30

—

35

—

15

—

20

—

25

—

15

—

20

—

25

—

tRTR Retransmit Recovery Time

10

—

10

—

10

—

tEFL Reset to Empty Flag Low

—

25

—

30

—

35

tHFH,FFH Reset to Half-Full and Full Flag High

—

25

—

30

—

35

tRTF Retransmit Low to Flags Valid

—

25

—

30

—

35

tREF Read Low to Empty Flag Low

—

15

—

20

—

25

tRFF Read High to Full Flag High

tRPE Read Pulse Width after EF High

—

15

—

20

—

25

15

—

20

—

25

—

tWEF Write High to Empty Flag High

—

15

—

20

—

25

tWFF Write Low to Full Flag Low

—

15

—

20

—

25

tWHF Write Low to Half-Full Flag Low

—

25

—

30

—

35

tRHF Read High to Half-Full Flag High

tWPF Write Pulse Width after FF High

tXOL

Read/Write to XO Low

tXOH Read/Write to XO High

tXI

XI Pulse Width(2)

tXIR

XI Recovery Time

tXIS

XI Set-up Time

—

25

—

30

—

35

15

—

20

—

25

—

—

15

—

20

—

25

—

15

—

20

—

25

15

—

20

—

25

—

10

—

10

—

10

—

10

—

10

—

10

—

NOTES:

1. Timings referenced as in AC Test Conditions.

2. Pulse widths less than minimum value are not allowed.

3. Values guaranteed by design, not currently tested.

4. Only applies to read data flow-through mode.

Unit

MHz

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

3208 tbl 06

5.07

3

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