IDT7280/7281/7282 CMOS DUAL ASYNCHRONOUS FIFO
DUAL 256 x 9, DUAL 512 x 9 and DUAL 1K x 9
PRELIMINARY INFORMATION
COMMERCIAL TEMPERATURE RANGE
W
t WEF
EF
t RPE
R
Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse
3208 drw 09
R
t RFF
FF
t WPF
W
Figure 8. Minimum Timing for an Full Flag Coincident Write Pulse
3208 drw 10
W
R
HALF-FULL OR LESS
t WHF
HF
MORE THAN HALF-FULL
Figure 9. Half-Full Flag Timing
t RHF
HALF-FULL OR LESS
3208 drw 11a
WRITE TO
LAST PHYSICAL
LOCATION
W
R
t XOL
t XOH
READ FROM
LAST PHYSICAL
LOCATION
t XOL
t XOH
XO
Figure 10. Expansion Out
3208 drw 10b
5.07
7