RTL8130 View Datasheet(PDF) - Realtek Semiconductor

Part Name

Description

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RTL8130

REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH MII & AUI INTERFACE

Realtek Semiconductor 

RTL8130 Preliminary

4.7 10 Mbps AUI Interface(AUI mode, 8 pins)

Symbol

CD+, CD-

RX+, RX-

TX+, TX-

Type

I

I

O

AUI(RXD0)

I

BNC(TXD0)

O

Pin No

40, 41

38, 39

44, 45

90

83

Description

This AUI collision input pair carries the differential collision input

signal from the MAU.

This AUI receive input pair carries the differential receive input

signal from the MAU.

This AUI transmit output pair contains differential line drivers which

send Manchester encoded data to the MAU. These outputs are source

followers and require 270Ω pull-down resistors to GND.

AUI mode:

This input is used to detect the usage of an external MAU on the AUI

interface. The input should be driven low for embedded BNC and

high for external MAU. This pin is pulled low internally.

AUI mode:

This pin is used to control the power of the embedded coaxial

transceiver. When low, it will disable the power of the transceiver.

This pin goes high only when:

1. The medium type is forced to BNC mode, and the AUI pin is

low.

2. Both UTP and MII link fail in auto-detect medium mode, and

the AUI pin is low.

4.8 100/10BASE-T UTP Interface(7 pins)

Symbol

TXD+

TXD-

RXIN+

RXIN-

X1(XTAL50)

X2

XTALSELB

Type

O

O

I

I

I

O

I

Pin No

68

67

63

62

55

54

70

Description

100/10BASE-T transmit(Tx) data.

100/10BASE-T receive(Rx) data.

X1 is internal clock input from 50 MHz OSC.

X2 is crystal feedback output and is left open when 50MHz OSC is

applied.

The XTALSELB must be left open to use 50MHz OSC as the clock

source.

4.9 TEST AND THE OTHER PINS(6 pins)

Symbol

RTT2-3

RTSET

NC

Type

TEST

I/O

Pin No

58, 57

61

52, 64, 65

Description

Chip test pins.

This pin must pull low by 1.8KΩ resistor.

* All pins are relatively assigned and are subject to change when needed.

1999/5/30

8

Ver.1.1

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