RTL8130 View Datasheet(PDF) - Realtek Semiconductor
Part Name
Description
View to exact match
RTL8130 Datasheet PDF : 55 Pages
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SERRB
STOPB
RSTB
O/D
S/T/S
I
RTL8130 Preliminary
resets itself. After the host clears the system error, the RTL8130
continues its operation.
When the RTL8130 is the bus target and a parity error is detected, the
RTL8130 asserts this PERRB pin.
138
System Error: If an address parity error is detected and Configuration
Space Status register bit 15 (detected parity error) is enabled,
RTL8130 asserts both SERRB pin and bit 14 of Status register in
Configuration Space.
136
Stop: Indicates the current target is requesting the master to stop the
current transaction.
103
Reset: When RSTB is asserted low, the RTL8130 performs the
internal system hardware reset. RSTB must be held for a minimum of
120ns periods.
4.3 Flash/EEPROM Interface(29 pins)
Symbol
MA16-3,
MA2/EESK,
MA1/EEDI,
MA0/EEDO
EECS
MD7-0
ROMCSB
OEB
WEB
Type
O
O
O
O/I
O
I/O
O
O
O
Pin No
47-46, 36-31, 29, 27,
25-24, 22, 20
18
17
16
19
11, 10, 8-3
15
14
13
Description
Boot PROM address bus: used to access up to 128k byte flash memory
or boot PROM.
These three pins are switched to EESK, EEDI, EEDO in 9346
programming or auto-load mode.
9346 chip select
Boot PROM data bus
ROM Chip Select: This is the chip select signal of the Boot PROM.
Output Enable: This enables the output buffer of the boot PROM
during a read operation.
Write Enable: This signal strobes data into the flash memory during a
write cycle.
4.4 Power Pin(38 pins)
Symbol
VDD
GND
Type
P
P
Pin No
2, 12, 23, 26, 37, +5V
43, 49, 50, 53, 66,
72, 82, 94, 97,
107, 117, 128, 141,
151
9, 21, 28, 30, 42, Ground
48, 51, 56, 60, 69,
84, 99, 100, 101,
112, 122, 134, 146,
156
Description
4.5 LED Interface(3 pins)
Symbol
LED0, 1, 2
Type
O
Pin No
75, 74, 73
LED pins
Description
1999/5/30
6
Ver.1.1
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