UPD45128163-I-E View Datasheet(PDF) - Elpida Memory, Inc

Part Name

Description

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UPD45128163-I-E

128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Elpida Memory, Inc 

µPD45128163-I-E

Asynchronous Characteristics

Parameter

ACT to REF/ACT command period (operation)

REF to REF/ACT command period (refresh)

ACT to PRE command period

PRE to ACT command period

Delay time ACT to READ/WRITE command

ACT (one) to ACT (another) command period

Data-in to PRE command period

Data-in to ACT (REF)

command period

(Auto precharge)

/CAS latency = 3

/CAS latency = 2

Mode register set cycle time

Transition time

Refresh time (4,096 refresh cycles)

Symbol

tRC

tRC1

tRAS

tRP

tRCD

tRRD

tDPL

tDAL3

tDAL2

tRSC

tT

tREF

MIN.

67.5

67.5

45

20

20

15

15

1CLK

+22.5

1CLK

+20

2

0.5

MAX.

120,000

30

64

Unit

ns

ns

ns

ns

ns

ns

ns

ns

ns

CLK

ns

ms

Note

1

Note 1. The –A75 grade device can satisfy the tDAL3 spec of 1CLK+20 ns for up to and including 125MHz operation.

36

Data Sheet E0729N10 (Ver. 1.0)

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