UPD45128163-I-E View Datasheet(PDF) - Elpida Memory, Inc

Part Name

Description

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UPD45128163-I-E

128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Elpida Memory, Inc 

µPD45128163-I-E

7.1 Burst Length and Sequence

[Burst of Two]

Starting address

(column address A0, binary)

0

1

Sequential addressing sequence

(decimal)

0, 1

1, 0

Interleave addressing sequence

(decimal)

0, 1

1, 0

[Burst of Four]

Starting address

(column address A1 - A0, binary)

00

01

10

11

Sequential addressing sequence

(decimal)

0, 1, 2, 3

1, 2, 3, 0

2, 3, 0, 1

3, 0, 1, 2

Interleave addressing sequence

(decimal)

0, 1, 2, 3

1, 0, 3, 2

2, 3, 0, 1

3, 2, 1, 0

[Burst of Eight]

Starting address

(column address A2 - A0, binary)

000

001

010

011

100

101

110

111

Sequential addressing sequence

(decimal)

0, 1, 2, 3, 4, 5, 6, 7

1, 2, 3, 4, 5, 6, 7, 0

2, 3, 4, 5, 6, 7, 0, 1

3, 4, 5, 6, 7, 0, 1, 2

4, 5, 6, 7, 0, 1, 2, 3

5, 6, 7, 0, 1, 2, 3, 4

6, 7, 0, 1, 2, 3, 4, 5

7, 0, 1, 2, 3, 4, 5, 6

Interleave addressing sequence

(decimal)

0, 1, 2, 3, 4, 5, 6, 7

1, 0, 3, 2, 5, 4, 7, 6

2, 3, 0, 1, 6, 7, 4, 5

3, 2, 1, 0, 7, 6, 5, 4

4, 5, 6, 7, 0, 1, 2, 3

5, 4, 7, 6, 1, 0, 3, 2

6, 7, 4, 5, 2, 3, 0, 1

7, 6, 5, 4, 3, 2, 1, 0

Full page burst is an extension of the above tables of sequential addressing, with the length being 512 (for 8M ×16

device).

Data Sheet E0729N10 (Ver. 1.0)

21

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