EDS1232AATA-60TI View Datasheet(PDF) - Elpida Memory, Inc

Part Name

Description

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EDS1232AATA-60TI

128M bits SDRAM WTR (Wide Temperature Range)

Elpida Memory, Inc 

EDS1232AATA-TI

DC Characteristics 1 (TA = –40 to +85°C, VDD, VDDQ = 3.3V±0.3V, VSS, VSSQ = 0V)

Parameter

/CAS latency

Symbol Grade max.

Unit

Test condition

Notes

Operating current

(CL = 2)

(CL = 3)

IDD1

IDD1

-60

120

-75

105

-60

120

-75

105

mA

Burst length = 1

tRC ≥ tRC (min.)

1

IO = 0mA

mA

One bank active

Standby current in power down IDD2P

1

Standby current in power down

(input signal stable)

IDD2PS

1

mA

CKE ≤ VIL (max.) tCK = 15ns

mA

CKE ≤ VIL (max.) tCK = ∞

Standby current in non power

down

IDD2N

20

CKE ≥ VIH (min.) tCK = 15ns

mA

CS ≥ VIH (min.)

Input signals are changed one

time during 30ns

Standby current in non power

down

IDD2NS

8

(input signal stable)

mA

CKE ≥ VIH (min.) tCK = ∞

Active standby current in power

down

IDD3P

5

mA

CKE ≤ VIL (max.) tCK = 15ns

Active standby current in power

down (input signal stable)

IDD3PS

4

mA

CKE ≤ VIL (max.), tCK = ∞

Active standby current in non

power down

IDD3N

25

CKE ≥ VIH (min.), tCK = 15 ns,

mA

/CS ≥ VIH (min.),

Input signals are changed one

time during 30ns.

Active standby current in non

power down

IDD3NS

15

(input signal stable)

mA

CKE ≥ VIH (min.), tCK = ∞,

Burst operating current

IDD4

-60

200

-75

180

mA

tCK ≥ tCK (min.),

IO = 0mA, All banks active

2

Refresh current

IDD5

-60

240

-75

210

mA

tRC ≥ tRC (min.)

3

Self refresh current

IDD6

2.0

mA

VIH ≥ VDD − 0.2V,

VIL ≤ GND + 0.2V

Notes: 1. IDD1 depends on output loading and cycle rates. Specified values are obtained with the output open. In

addition to this, IDD1 is measured condition that addresses are changed only one time during tCK (min.).

2. IDD4 depends on output loading and cycle rates. Specified values are obtained with the output open.

In addition to this, IDD4 is measured condition that addresses are changed only one time during tCK

(min.).

3. IDD5 is measured on condition that addresses are changed only one time during tCK (min.).

DC Characteristics 2 (TA = –40 to +85°C, VDD, VDDQ = 3.3V±0.3V, VSS, VSSQ = 0V)

Parameter

Input leakage current

Output leakage current

Output high voltage

Output low voltage

Symbol min.

ILI

–1.0

ILO

–1.5

VOH

2.4

VOL

—

max.

1.0

1.5

—

0.4

Unit Test condition

Note

µA

0 ≤ VIN ≤ VDDQ, VDDQ = VDD, All

other pins not under test = 0V

µA 0 ≤ VOUT ≤ VDDQ, DOUT is disabled

V

IOH = –2 mA

V

IOL = 2 mA

Data Sheet E0305E30 (Ver. 3.0)

5

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