CY7C4215-15AXI(2011) View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

View to exact match

CY7C4215-15AXI
(Rev.:2011)

256/512/1K/4K x 18 Synchronous FIFOs

Cypress Semiconductor 

CY7C4205/CY7C4215

CY7C4225/CY7C4245

Switching Waveforms (continued)

Figure 19. Read Expansion Out Timing

RCLK

RXO

REN

tCLKH

Note 36

tXO

tENS

tXO

WXI

WCLK

RXI

RCLK

FL/RT

REN/WEN

EF/FF

and/all

async flags

HF/PAE/PAF

Figure 20. Write Expansion In Timing

tXI

tXIS

Figure 21. Read Expansion In Timing

tXI

tXIS

Figure 22. Retransmit Timing[37, 38, 39]

tPRT

tRTR

Notes:

36. Read from Last Physical Location.

37. Clocks are free running in this case.

38. The flags may change state during Retransmit as a result of the offset of the read and write pointers, but flags will be valid at tRTR.

39. For the synchronous PAE and PAF flags (SMODE), an appropriate clock cycle is necessary after tRTR to update these flags.

Document Number: 001-45652 Rev. *B

Page 19 of 25

[+] Feedback

Share Link: