ADN2816 View Datasheet(PDF) - Analog Devices

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Description

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ADN2816

Continuous Rate 10 Mb/s to 675 Mb/s Clock and Data Recovery IC

Analog Devices 

Data Sheet

APPLICATIONS INFORMATION

PCB DESIGN GUIDELINES

Proper RF PCB design techniques must be used for optimal

performance.

Power Supply Connections and Ground Planes

Use of one low impedance ground plane is recommended. The

VEE pins should be soldered directly to the ground plane to

reduce series inductance. If the ground plane is an internal

plane and connections to the ground plane are made through

vias, multiple vias can be used in parallel to reduce the series

inductance, especially on Pin 23, which is the ground return for

the output buffers. The exposed pad should be connected to the

GND plane using plugged vias so that solder does not leak

through the vias during reflow.

Use of a 22 μF electrolytic capacitor between VCC and VEE is

recommended at the location where the 3.3 V supply enters the

PCB. When using 0.1 μF and 1 nF ceramic chip capacitors, they

should be placed between the IC power supply VCC and VEE,

as close as possible to the ADN2816 VCC pins.

ADN2816

If connections to the supply and ground are made through vias,

the use of multiple vias in parallel helps to reduce series

inductance, especially on Pin 24, which supplies power to the

high speed CLKOUTP/CLKOUTN and DATAOUTP/

DATAOUTN output buffers. Refer to Figure 19 for the

recommended connections.

By using adjacent power supply and GND planes, excellent high

frequency decoupling can be realized by using close spacing

between the planes. This capacitance is given by

CPLANE  0.88εr A/d pF

where:

r is the dielectric constant of the PCB material.

A is the area of the overlap of power and GND planes (cm2).

d is the separation between planes (mm).

For FR-4, r = 4.4 mm and 0.25 mm spacing, C ~15 pF/cm2.

VCC

+ 22µF

0.1µF 1nF

50Ω TRANSMISSION LINES

DATAOUTP

DATAOUTN

CLKOUTP

CLKOUTN

0.1µF

1nF

0.1µF

50Ω

OPTICAL

TRANSCEIVER

MODULE

50Ω

VCC

VCC

VCC

VREF

NIN

PIN

NC

NC

VEE

1

2

3

4

5

6

7

8

24

EXPOSED PAD 23

TIED OFF TO 22

VEE PLANE 21

WITH VIAS 20

19

18

17

1nF

VCC

VEE

NC

SDA

SCK

SADDR5

VCC

VEE

1nF

0.1µF

I2C CONTROLLER

I2C CONTROLLER

0.1µF

VCC

µC

VCC

0.1µF 1nF

0.47µF ±20%

>300MΩ INSULATION RESISTANCE

Figure 19. Typical ADN2816 Applications Circuit

Rev. C | Page 19 of 24

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