A1374 View Datasheet(PDF) - Allegro MicroSystems

Part Name

Description

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A1374

High Precision, Output Pin Programmable Linear Hall Effect Sensors

Allegro MicroSystems 

A1373 and

A1374

High Precision, Output Pin Programmable

Linear Hall Effect Sensors

Programming Guidelines

• A bypass capacitor rated at 0.1μF must be mounted between the

VOUT pin and the GND pin during programming. The power

supply used for programming should be capable of delivering 28

V and 300 mA.

• Before beginning any Blow Fuse mode or Lock Device mode

code sequence, the device MUST be reset by cycling VCC power-

off and power-on again. Cycling power resets the device by set-

ting all bitfields that have intact fuses to 0. Bitfields with blown

fuses are unaffected.

In Try Value mode, to retain register settings from previous code

sequences, do not cycle power between sequences.

When a register is selected in Register Selection mode, when

the VPH pulse is sent to enter the Bitfield Selection mode, the

bitfields with intact fuses in that register are reset to 0.

• In Try Value mode, all bits in the register can be set in one code

sequence. For example, setting the binary value 0110 and sending

a VPH pulse sets code 6. However, because of the power require-

ment, blowing fuses in Blow Fuse mode must be performed one

bitfield at a time. In order to program (blow fuses) for binary

0110, the bitfields MUST be programmed (blown) in two differ-

ent code sequences:one setting the 0100 bit, and the other setting

the 0010 bit (in either order). Power must be cycled before each

of the two sequences.

• Although a bitfield cannot be reset once its fuse is blown,

additional bitfields can be blown at any time, until the device is

locked by setting the Lock bit. For example, if bit 1 (0010) has

been blown, it is possible to blow bit 0 (0001). Because bit 1 was

already blown, the end result will be 0011 (code 3).

• Before powering down the device after programming, observe

the recommended delay at the mid voltage level, to ensure that

the last VPH pulse has decayed before voltage drops to the VPL

voltage. This will avoid the generation of overlapping VPL and

VPH pulses. At the end of a Lock Device mode code sequence,

the delay is not necessary.

• Programming order is important in both Try Value mode and

in Blow Fuse mode. There will be a slight parametric shift in

sensitivity after programming the temperature coefficient, and a

slight quiescent voltage shift with polarity. Subsequent changes to

sensitivity can cause a shift in the quiescent output voltage.

The following order is recommended:

a. Polarity

b. TC Register

c. Sens Coarse

d. QVO Coarse

e. Sens Fine

g. QVO Fine

The Clamp Bit register can be programmed at any point in the

order, as no parametric shift is observed due to clamps.

• The actual distribution of parametric programming ranges are

wider than the specified programming ranges, in order to take

in to account manufacturing spread. The maximum possible

attainable range can be used with the understanding that other

specified parameters might be out of datasheet specification in

the extended range. (For an example, see the chart Sensitivity

Temperature Coefficient Range, in the Typical Characteristics

section.)

Allegro MicroSystems, Inc.

20

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

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