MX9691L View Datasheet(PDF) - Macronix International

Part Name

Description

View to exact match

MX9691L

SINGLE CHIP SOLID STATE DISK CONTROLLER

Macronix International 

Symbol

No.

FA[16:15]/

1-2

ATADET[1:0]

RDFLASH1#

54

RDFLASH0#

42

WRFLASH1#

19

WRFLASH0#

18

MX9691L

Type

I/O

(CMOS)

Description

This signal is used as flash memory chip high address line

16-15. These signals are also used to select configuration in

True IDE mode at power-on reset. ATADET1 is connected to

DSP's IPT1. ATADET0 is connected to DSP's IPT0. VDD is

connected to IPT2.

O

(CMOS)

O

(CMOS)

O

(CMOS)

O

(CMOS)

Master/Slave selection in True IDE mode :

ATADET1

ATADET0

mode selected

1

1

one drive

0

0

master of two drives

1

0

slave of two drives

This power-on configuration can be accessed from PCMCIA/

ATA port 601Ch bit3-2. These pins include internal pull-up

resistors.

Flash memory ouptut enable 1 for bank1:

This signal will be asserted by flash memory read operation

when flash memory read address latch, port 601Dh

bit 8= 1(i.e. FA23=1).

Note: Flash memory access window is mapped to 32KW

data and code space 8000h~ffffh.

Flash memory ouptut enable 0 for bank0:

This signal will be asserted by flash memory read operation

when flash memory read address latch, port 601Dh

bit 8 = 0(i.e. FA23=0).

Flash memory write enable 1 for bank1:

This signal will be asserted by flash memory write operation

when flash memory write address latch, port 601Fh

bit 8 = 1(i.e. FA23=1).

Flash memory write enable 0 for bank0:

This signal will be asserted by flash memory write operation

when flash memory write address latch, port 601Fh

bit 8 = 0(i.e. FA23=0).

P/N:PM0546

REV. 1.1, JUL. 02, 1999

8

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