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MX9691L View Datasheet(PDF) - Macronix International

Part Name
Description
View to exact match
MX9691L
Macronix
Macronix International Macronix
MX9691L Datasheet PDF : 41 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Symbol
No.
WP/IOCS16#
83
REG#/DACK#
95
HCE1#/
115
CS1FX#
HCE2#/
114
CS3FX#
INPACK#/ DREQ
118
SPKR/DASP#
93
STSCHG/
90
PDIAG#
P/N:PM0546
MX9691L
Type
O,OD
(CMOS)
I
(CMOS)
I
(CMOS)
I
(CMOS)
O
(CMOS)
I/O
(CMOS)
I/O
(CMOS)
Description
WRITE PROTECT or 16-bit I/O TRANSFER :
In PCMCIA mode, this bit has two functions. In PCMCIA
common-memory mode,this signal indicates write protect.
In PCMCIA I/O mode, when IOIS16# is asserted low, it
indicates that a 16-bit data transfer is active on PCMCIA
bus.
In True IDE mode, the IOCS16# signal indicates that a
16-bit buffer transfer is active on the host bus.
This open drain signal is only driven on assertion(low).
Attribute memory and I/O select :
In PCMCIA mode, this signal is used to select attribute
memory and I/O space. In True IDE mode, this signal is
used during DMA with the DREQ, IOR# and IOW# signals
to transfer data between the host and the MX9691L. This pin
includes an internal pull-up resistor.
Card enable 1 or Chip select 0:In PCMCIA mode,this signal
is card enable 1. This signal can enable either even or odd
numbered-address bytes onto HD7:0. In True IDE mode, this
signal accesses the MX9691 command block registers. This
input is ignored during DMA data transfer, i.e. when the
DACK# signal is low. This pin includes an internal pull-up
resistor.
Card enable 2 or Chip select 1:
In PCMCIA mode,this signal is card enable 2. This signal
can enable odd numbered-address bytes onto HD15:8. In
True IDE mode, this signal accesses the MX9691L control
block registers. This pin includes an internal pull-up
resistor.
Input Acknowledge or DMA request :In PCMCIA mode, this
signal is asserted when the MX9691 is configured to respond
to I/O card read cycles at all addresses. In True IDE mode,
this signal is DREQ and is issued during DMA transfers to
indicate that the MX9691L is ready for DMA transfer.
Speaker or slave present : In PCMCIA mode, the
output-enable for this signal is controlled by the card
configuration registers. In True IDE mode, this signal is used
as the slave-present detector.
Status change or pass diagnostics :In PCMCIA mode, this
signal is used to indicate changes in the RDY/BSY#,WP
signals in card configuration registers. In True IDE mode,
this active low signal is used between two embedded ATA
drive to indicate that the drive in slave mode has passed
diagnostics.
REV. 1.1, JUL. 02, 1999
5

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