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FSFM260N View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
FSFM260N
Fairchild
Fairchild Semiconductor Fairchild
FSFM260N Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Configuration
GND
VCC
FB
ILIM
8-DIP
Drain
Drain
Drain
VSTR
FSFM260 Rev.1.0.0
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin # Name
1
GND
2
VCC
3
FB
4
ILIM
5
6,7,8
VSTR
Drain
Description
Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply input, providing internal operating current for
both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator. The
collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should
be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload pro-
tection triggers, which shuts down the FPS.
Peak Current Limit. Adjusts the peak current limit of the Sense FET. The feedback 0.9mA
current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any ex-
ternal resistor to GND on this pin to determine the peak current limit.
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At
startup, the internal high-voltage current source supplies internal bias and charges the exter-
nal capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is
disabled. It is not recommended to connect VSTR and drain together.
SenseFET Drain. High-voltage power SenseFET drain connection.
© 2009 Fairchild Semiconductor Corporation
FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1
4
www.fairchildsemi.com

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