DAP011 View Datasheet(PDF) - ON Semiconductor
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DAP011 Datasheet PDF : 24 Pages
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DAP011/DAP011C
To simplify the circuit architecture, the timer pin also
shares the soft−start comparator, as Figure 31 details. That
means that the soft−start is linked to the timer duration by a
ratio of 0.1 or 10% roughly. If we select a 100 ms timer
period, then the soft−start duration will be 10 ms. Figure 32
details Pin 3 voltages during a soft−start sequence or a
skip−cycle activity. The soft−start capacitor is reset by either
the soft−start completion within the burst or by the skip
comparator (500 ms Soft Skip Ramp) if the burst length is
shorter than the soft−start duration.
Figure 32. Soft−start is Also Activated During Skip Cycle to Offer a Smooth Current Ramping Wave Shape
How to calculate the timer capacitor value? By simply
apply V x C = I x t relationship. If we look at Figure 31, we
can see that the timer is completed when Vpin3 reaches 4.0 V.
If we have a 20 mA charging current and we want 90 ms of
timer duration, then C is obtained by: C = I x t / V = 20 m x
100m / 4 = 500 nF. If we select a 0.47 mF, we end−up with
a final duration of 94 ms. The soft−start being 10% of this
value, we will see a soft−start sequence of 9.4 ms.
Internal Ramp compensation
Ramp compensation is a known mean to cure
subharmonic oscillations. These oscillations take place at
half the switching frequency and occur only during
Continuous Conduction Mode (CCM) with a duty−cycle
greater than 50%. To lower the current loop gain, one usually
injects between 50 and 100% of the inductor downslope.
Figure 33 depicts how internally the ramp is generated.
Please note that the ramp signal will be disconnected from
the CS pin, during the OFF time.
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