LTC1735C-1 View Datasheet(PDF) - Linear Technology

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LTC1735C-1

High Efficiency Synchronous Step-Down Switching Regulator

Linear Technology 

LTC1735-1

PI FU CTIO S

COSC (Pin 1): External capacitor COSC from this pin to

ground sets the operating frequency.

RUN/SS (Pin 2): Combination of Soft-Start and Run

Control Inputs. A capacitor to ground at this pin sets the

ramp time to full current output. The time is approximately

1.25s/µF. Forcing this pin below 1.5V causes the device to

be shut down. In shutdown all functions are disabled.

Latchoff overcurrent protection is also invoked via this pin

as described in the Applications Information section.

ITH (Pin 3): Error Amplifier Compensation Point. The

current comparator threshold increases with this control

voltage. Nominal voltage range for this pin is 0V to 2.4V.

PGOOD (Pin 4): Open-Drain Logic Output and Forced

Continuous/Synchronization Input. The PGOOD pin is

pulled to ground when the voltage on the VOSENSE pin is

not within ±7.5% of its nominal set point. If power good

indication is not needed, this pin can be tied to ground to

force continuous synchronous operation. Clocking this

pin with a signal above 1.5VP-P synchronizes the internal

oscillator to the external clock. Synchronization only

occurs while the main output is in regulation (PGOOD not

internally pulled low). When synchronized, Burst Mode

operation is disabled but cycle skipping is allowed at low

load currents. This pin requires a pull-up resistor for

power good indication. Do not connect this pin directly to

an external source (or INTVCC). Do not exceed INTVCC on

this pin.

SENSE – (Pin 5): The (–) Input to the Current Comparator.

SENSE + (Pin 6): The (+) Input to the Current Comparator.

Built-in offsets between SENSE + and SENSE – pins in

conjunction with RSENSE set the inductor current trip

threshold.

VOSENSE (Pin 7): Receives the feedback voltage from an

external resistive divider across the output.

SGND (Pin 8): Small-Signal Ground. All small-signal

components such as COSC, CSS, the feedback divider plus

the loop compensation resistors and capacitor(s) should

single-point tie to this pin. This pin should, in turn, connect

to PGND.

EXTVCC (Pin 9): Input to the Internal Switch Connected to

INTVCC. This switch closes and supplies VCC power when-

ever EXTVCC is higher than 4.7V. See EXTVCC connection

in Applications Information section. Do not exceed 7V on

this pin and ensure EXTVCC is ≤ VIN.

PGND (Pin 10): Driver Power Ground. This pin connects

to the source of the bottom N-channel MOSFET, the anode

of the Schottky diode and the (–) terminal of CIN.

BG (Pin 11): High Current Gate Drive for the Bottom

N-Channel MOSFET. Voltage swing at this pin is from

ground to INTVCC .

INTVCC (Pin 12): Output of the Internal 5.2V Low Dropout

Regulator and EXTVCC Switch. The driver and control

circuits are powered from this voltage. Decouple to power

ground with a 1µF ceramic capacitor placed directly adja-

cent to the IC together with a minimum of 4.7µF tantalum

or other low ESR capacitor.

VIN (Pin 13): Main Supply Pin. This pin must be closely

decoupled to power ground.

SW (Pin 14): Switch Node Connection to Inductor and

Bootstrap Capacitor. Voltage swing at this pin is from a

Schottky diode (external) voltage drop below ground to

VIN.

BOOST (Pin 15): Supply to Topside Floating Driver. The

bootstrap capacitor is returned to this pin. Voltage swing

at this pin is from a diode drop below INTVCC to VIN +

INTVCC.

TG (Pin 16): High Current Gate Drive for Top N-Channel

MOSFET. This is the output of a floating driver with a

voltage swing equal to INTVCC superimposed on the

switch node voltage SW.

7

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