LTC1735C-1 View Datasheet(PDF) - Linear Technology

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LTC1735C-1

High Efficiency Synchronous Step-Down Switching Regulator

Linear Technology 

LTC1735-1

U

OPERATIO (Refer to Functional Diagram)

POWER GOOD

A window comparator monitors the output voltage and its

open-drain output is pulled low when the divided down

output voltage (appearing at the VOSENSE pin) is not within

±7.5% of the reference voltage of 0.8V.

During a programmed output voltage transition (i.e., a

transition from 1.55V to 1.3V) the PGOOD open-drain

output will be pulled low and Burst Mode operation will be

disabled until the output voltage is within 7.5% of its newly

programmed value.

When the PGOOD pin is driven by an external oscillator

through a series resistor, cycle-skipping operation is

invoked and the internal oscillator is synchronized to the

external clock by comparator C. In this mode, the 25%

minimum inductor current clamp is removed, providing

low noise, constant frequency discontinuous operation

over the widest possible output current range. This con-

stant frequency operation is not quite as efficient as Burst

Mode operation, but does provide a lower noise, constant

frequency operation. When the power good window com-

parator indicates the output is not in regulation, the

PGOOD pin is pulled to ground and synchronization is

inhibited. Obviously when driving the PGOOD pin with an

external clock the power good indication is not available

unless additional circuitry is added.

If the PGOOD pin is tied to ground, continuous operation

is forced. This operation is the least efficient mode, but is

desirable in certain applications. The output can source

or sink current in this mode. When forcing continuous

operation and sinking current, current will be forced back

into the main power supply potentially boosting the input

supply to dangerous voltage levels—BEWARE.

APPLICATIO S I FOR ATIO

The basic LTC1735-1 application circuit is shown in

Figure 1 on the first page of this data sheet. External

component selection is driven by the load requirement

and begins with the selection of RSENSE. Once RSENSE

is known, COSC and L can be chosen. Next, the power

MOSFETs and D1 are selected. The operating frequency

and the inductor are chosen based largely on the desired

amount of ripple current. Finally, CIN is selected for its

ability to handle the large RMS current into the converter

and COUT is chosen with low enough ESR to meet the

output voltage ripple and transient specifications. The

circuit shown in Figure 1 can be configured for operation

up to an input voltage of 28V (limited by the external

MOSFETs).

RSENSE Selection For Output Current

RSENSE is chosen based on the required output current.

The LTC1735-1 current comparator has a maximum

threshold of 75mV/RSENSE and an input common mode

range of SGND to 1.1(INTVCC). The current comparator

threshold sets the peak of the inductor current, yielding a

maximum average output current IMAX equal to the peak

value less half the peak-to-peak ripple current, ∆IL.

Allowing a margin for variations in the LTC1735-1 and

external component values yields:

RSENSE

=

50mV

IMAX

COSC Selection for Operating Frequency

and Synchronization

The choice of operating frequency and inductor value is

a trade-off between efficiency and component size. Low

frequency operation improves efficiency by reducing

MOSFET switching losses, both gate charge loss and

transition loss. However, lower frequency operation

requires more inductance for a given amount of ripple

current.

The LTC1735-1 uses a constant frequency architecture

with the frequency determined by an external oscillator

capacitor COSC. Each time the topside MOSFET turns on,

the voltage on COSC is reset to ground. During the on-time,

COSC is charged by a fixed current. When the voltage on the

capacitor reaches 1.19V, COSC is reset to ground. The

process then repeats.

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