SST89C54-33-I-PJ View Datasheet(PDF) - Silicon Storage Technology
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SST89C54-33-I-PJ Datasheet PDF : 50 Pages
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FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
AC CHARACTERISTICS
Explanation of Symbols
Each timing symbol has 5 characters. The first character
P: PSEN#
1
is always a ‘T’ (stands for time). The other characters,
Q: Output data
depending on their positions, stand for the name of a
signal or the logical status of that signal. The following is
R: RD# signal
2
a list of all the characters and what they stand for.
T: Time
A: Address
C: Clock
V: Valid
W: WR# signal
3
D Input data
H: Logic level HIGH
X: No longer a valid logic level
Z: High Impedance (Float)
4
I: Instruction (program memory contents).
For example:
L: Logic level LOW or ALE
TAVLL=Time from Address Valid to ALE Low
5
TLLPL=Time from ALE Low to PSEN# Low
6
VIHT
VHT
VILT
VLT
344 ILL F28a.2
AC Inputs during testing are driven at VIHT (VDD -0.5V) for Logic "1" and
VILT (0.45V) for a Logic "0". Measurement reference points for inputs and
outputs are at VHT (0.2VDD + 0.9) and VLT (0.2VDD - 0.1)
Note: VHT- VHIGH Test
VLT- VLOW Test
VIHT-VINPUT HIGH Test
VILT- VINPUT LOW Test
AC TESTING INPUT/OUTPUT
FIGURE 26: AC TESTING INPUT/OUTPUT, FLOAT WAVEFORM
VLOAD +0.1V
VLOAD
VLOAD -0.1V
Timing Reference
Points
VOH -0.1V
VOL +0.1V
344 ILL F28b.1
For timing purposes a port pin is no longer floating when a 100 mV
change from load voltage occurs, and begins to float when a 100 mV
change from the loaded VOH/VOL level occurs. IOL/IOH = ± 20mA.
FLOAT WAVEFORM
7
8
9
10
11
TLHLL
ALE
12
TPLPH
TAVLL
TLLPL
TLLIV
PSEN#
TPLIV
13
TLLAX
TPLAZ TPXIZ
TPXIX
14
PORT 0
A7 - A0
INSTR IN
A7 - A0
TAVIV
15
PORT 2
A15 - A8
A15 - A8
344 ILL F13.3
16
FIGURE 27: EXTERNAL PROGRAM MEMORY READ CYCLE
© 2000 Silicon Storage Technology, Inc.
43
344-2 8/00
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