SST89C54-33-I-NJ View Datasheet(PDF) - Silicon Storage Technology
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SST89C54-33-I-NJ Datasheet PDF : 50 Pages
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FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
RST
PSEN#
ALE/PROG#
EA#
P3[3]
TSU
TES
TADS
TPROG
TDH
TBUP1
TDH
TBUP
TDH
TBUP
TBUPRCV
row address
byte address
row address
byte address
byte address
byte address
row address
P0
DI
DI
DI
P3[7:6], P2[7:6]
16K/32K Block
4K Block
0110b
row address = A15: A6; byte address = A5:A0
row address = A15: A5; byte address = A4:A0
344 ILL F07.4
FIGURE 15: BURST-PROGRAM
Program the entire addressed row by burst programming each byte sequentially within the row if the byte location
has been successfully erased and not yet programmed. This operation is only allowed when the security lock is
not activated on that flash memory block.
RST
PSEN#
TSU
TES
ALE/PROG#
EA#
P3[7:6], P2[7:6]
P0
P1
TOA
TAHA
1100b
DO
AL
TALA
P3[5:4], P2[5:0]
AH
344 ILL F08.3
FIGURE 16: BYTE-VERIFY
Read the code byte from the addressed flash memory location if the security lock is not activated on that flash
memory block.
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© 2000 Silicon Storage Technology, Inc.
25
344-2 8/00
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