SST89C54-33-I-NJ View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
View to exact match
SST89C54-33-I-NJ Datasheet PDF : 50 Pages
| |||
FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
Accessing Internal Memory (EA# = 0)
Accessing External Memory (EA# = 1)
VSS VDD RST
VSS VDD RST
XTAL1
0
Port 0
6
Address
and
Data
XTAL1
0
Port 0
6
General
Purpose
I/O
1
XTAL2
7
Bus
0 T2
XTAL2
7
0 T2
2
RXD 0
1 T2EX
RXD 0
1 T2EX
TXD 1
2
TXD 1
2
INT0# 2
Port 1 3
INT0# 2
Port 1 3
3
INT1# 3
4
Port 3
T0 4
5
INT1# 3
4
Port 3
T0 4
5
T1 5
6
WR# 6
7
T1 5
6
WR# 6
7
4
RD# 7
0
Port 2
6
Address
Bus
RD# 7
0
Port 2
6
General
Purpose
7
7
I/O
5
EA# ALE / PSEN#
PROG#
EA# ALE / PSEN#
PROG#
344 ILL F09.1
6
FIGURE 17: IN-APPLICATION PROGRAMMING MODE I/O ASSIGNMENT
7
TIMERS/COUNTERS
SERIAL I/O (UART)
The SST89C54/58 have three 16-bit registers that can
be used as either timers or event counters. The three
The SST89C54/58 Serial I/O ports is a full duplex port
that allows data to be transmitted and received simulta-
8
Timers/Counters are the Timer 0 (T0), Timer 1 (T1), and neously in hardware by the transmit and receive regis-
Timer 2 (T2) registers. These three registers are located
in the SFR as pairs of 8-bit registers. The low byte of the
ters, respectively, while the software is performing other
tasks. The Serial I/O port performs the function of an
9
T0 register is stored in the Timer 0 LSB (TL0) special UART (Universal Asynchronous Receiver/Transmitter)
function register and the high byte of the T0 register is
stored in the Timer 0 MSB (TH0) special function regis-
chip. The transmit and receive registers are both located
in the Serial Data Buffer (SBUF special function register.
10
ter. The low byte of the T1 register is stored in the Timer Writing to the SBUF register loads the transmit register,
LSB (Tl1) special function register and the high byte of
the T1 register is stored in the Timer 1 MSB (TH1) special
and reading from the SBUF register obtains the contents
of the receive registers.
11
function register. The low byte of the T2 register is stored
in the Timer 2 LSB (TL2) special function register and the
high byte of the T2 register is stored in the Timer 2 MSB
(TH2) special function register.
The Serial I/O port has four modes of operation which are
selected by the Serial Port Mode Specifier (SM0 and
SM1) bits of the Serial Port Control (SCON) special
function register. In all four modes, transmission is initi-
12
ated by any instruction that uses the SBUF register as a
destination register. Reception is initiated in mode 0
13
when the Receive Interrupt (RI) flag bit of the Serial Port
Control (SCON) special function register is cleared and
the Reception Enable/ Disable (REN) bit of the SCON
14
register is set. Reception is initiated in the other modes
by the incoming start bit if the REN bit of the SCON
register is set.
15
16
© 2000 Silicon Storage Technology, Inc.
31
344-2 8/00
Share Link: 