ADUC814BRU View Datasheet(PDF) - Analog Devices
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ADUC814BRU Datasheet PDF : 72 Pages
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ADuC814
0.30
0.25
0.20
0.15
0.10
0.05
0
–0.50
–0.10
–0.15
–0.20
–0.25
0
AVDD/DVDD = 5V
fS = 152kHz
511 1023 1535 2047 2559
ADC CODES
3071
3583
4095
Figure 7. Typical DNL Error, VDD = 5 V
0.30
0.25
0.20
AVDD/DVDD = 3V
fS = 152kHz
0.15
0.10
0.05
0
–0.50
–0.10
–0.15
–0.20
–0.25
0
511 1023 1535 2047 2559 3071 3583 4095
ADC CODES
Figure 8. Typical DNL Error, VDD = 3 V
Figure 9 and Figure 10 show the variation in worst-case positive
(WCP) DNL and worst-case negative (WCN) DNL versus
external reference input voltage.
0.6
0.6
AVDD /DVDD = 5V
fS = 152kHz
0.4
0.4
0.2
WCP DNL
0.2
0
0
–0.2
–0.2
WCN DNL
–0.4
–0.4
–0.6
–0.6
0.5
1.0
1.5
2.0
2.5
5.0
EXTERNAL REFERENCE (V)
Figure 9. Typical Worst-Case DNL Error vs. VREF, VDD = 5 V
0.7
0.7
AVDD/DVDD = 3V
fS = 152kHz
0.5
0.5
WCP DNL
0.3
0.3
0.1
0.1
–0.1
–0.3
WCN DNL
–0.1
–0.3
–0.5
–0.5
–0.7
–0.7
0.5
1.0
1.5
2.0
2.5
3.0
EXTERNAL REFERENCE (V)
Figure 10. Typical Worst-Case DNL Error vs. VREF, VDD = 3 V
Figure 11 shows a histogram plot of 10,000 ADC conversion
results on a dc input with VDD = 5 V. The plot illustrates an
excellent code distribution pointing to the low noise
performance of the on-chip precision ADC.
10000
8000
6000
4000
2000
0
817
818
819
820
821
CODE
Figure 11. Code Histogram plot, VDD = 5 V
Figure 12 shows a histogram plot of 10,000 ADC conversion
results on a dc input for VDD = 3 V. The plot again illustrates a
very tight code distribution of 1 LSB with the majority of codes
appearing in one output bin.
10000
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
817
818
819
820
821
CODE
Figure 12. Code Histogram Plot, VDD = 3 V
Rev. A | Page 14 of 72
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