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ADUC814BRU View Datasheet(PDF) - Analog Devices

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ADUC814BRU Datasheet PDF : 72 Pages
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ADuC814
PIN CONFIGURATION AND FUNCTION DESCRIPTION
Table 3. Pin Descriptions
Pin No. Mnemonic Type
1
DGND
S
2
DLOAD
I
3–7
P3.0 – P3.4 I/O
3
P3.0/RxD
I/O
4
P3.1/TxD
I/O
5
P3.2/INT0
I/O
6
P3.3/INT1
I/O
7
P3.4/T0/
I/O
CONVST
8–9
P1.0–P1.1
I/O
8
P1.0/T2
I/O
9
P1.1/T2EX
I/O
10
RESET
I
11–12 P1.2–P1.3
I
11
P1.2/ADC0 I
12
P1.3/ADC1 I
13
AVDD
S
14–15 AGND
G
16
VREF
I/O
DGND 1
DLOAD 2
28 DVDD
27 XTAL2
P3.0/RxD 3
26 XTAL1
P3.1/TxD 4
25 SCLOCK
P3.2/INT0 5
24 P3.7/SDATA/MOSI
P3.3/INT1 6
23 P3.6/MISO
P3.4/T0/CONVST 7 ADuC814 22 P3.5/T1/SS/EXTCLK
TOP VIEW
P1.0/T2 8 (Not to Scale) 21 P1.7/ADC5/DAC1
P1.1/T2EX 9
20 P1.6/ADC4/DAC0
RESET 10
19 P1.5/ADC3
P1.2/ADC0 11
18 P1.4/ADC2
P1.3/ADC1 12
AVDD 13
AGND 14
17 CREF
16 VREF
15 AGND
Figure 2. Pin Configuration
Function
Digital Ground. Ground reference point for the digital circuitry.
Debug/Serial Download Mode. Enables when pulled high through a resistor on power-on or RESET. In
this mode, DLOAD may also be used as an external emulation I/O pin, therefore the voltage level at
this pin must not be changed during this mode of operation because it may cause an emulation
interrupt that halts code execution. User code is executed when this pin is pulled low on power-on or
RESET.
Bidirectional Port Pins with Internal Pull-Up Resistors. Port 3 pins that have 1s written to them are
pulled high by the internal pull-up resistors, and in that state they can be used as inputs. As inputs,
with Port 3 pins being pulled low externally, they source current because of the internal pull-up
resistors. When driving a 0-to-1 output transition, a strong pull-up is active during S1 of the
instruction cycle. Port 3 pins also have various secondary functions which are described next.
Receiver Data Input (asynchronous) or Data Input/Output (synchronous) in Serial (UART) Mode.
Transmitter Data Output (asynchronous) or Clock Output (synchronous) in Serial (UART) Mode.
Interrupt 0, programmable edge or level-triggered interrupt input, which can be programmed to one
of two priority levels. This pin can also be used as agate control input to Timer 0.
Interrupt 1, programmable edge or level-triggered interrupt input, which can be programmed to one
of two priority levels. This pin can also be used as agate control input to Timer 1.
Timer/Counter 0 Input and External Trigger Input for ADC Conversion Start.
Bidirectional Port Pins with Internal Pull-Up Resistors. Port 1 pins that have 1s written to them are
pulled high by the internal pull-up resistors, and in that state they can be used as inputs. As inputs
,with Port 1 pins being pulled low externally, they source current because of the internal pull-up
resistors When driving a 0-to-1 output transition a strong pull-up is active during S1 of the instruction
cycle. Port 1 pins also have various secondary functions which are described as follows.
Timer 2 Digital Input. Input to Timer/Counter 2. When enabled, Counter 2 is incremented in response
to a 1 to 0 transition of the T2 input.
Digital Input. Capture/Reload trigger for Counter 2.
Reset Input. A high level on this pin while the oscillator is running resets the device. There is an
internal weak pull-down and a Schmitt-trigger input stage on this pin.
Port 1.2 to P1.3. These pins have no digital output drivers, i.e., they can only function as digital inputs,
for which 0 must be written to the port bit. These port pins also have the following analog functionality:
ADC Input Channel 0. Selected via ADCCON2 SFR.
ADC Input Channel 1. Selected via ADCCON2 SFR.
Analog Positive Supply Voltage, 3 V or 5 V.
Analog Ground. Ground reference point for the analog circuitry.
Reference Input/Output. This pin is connected to the internal reference through a switch and is the
reference source for the analog to digital converter. The nominal internal reference voltage is 2.5 V
and this appears at the pin. This pin can be used to connect an external reference to the analog to
digital converter by setting ADCCON1.6 to 1. Connect 0.1 µF between this pin and AGND.
Rev. A | Page 10 of 72

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