Philips Semiconductors
Digital Signal Processor (DSP) for
cameras
Preliminary specification
SAA8110G
handbook, full pagewidth
SAA8110G
(OUTPUTS
CLOCKED
AT
CLK2)
Y(UV)7
to
Y(UV)0
YUV
LLC
PXQ
HREF
VSYNCOUT
HOST
YUV
LLC
PXQ
HREF
FF 00 00 SAV U0 Y0 V0 Y1 U2 Y2 V2 UN−1 YN−1 FF 00 00 EAV
sample moment
MGK165
Fig.14 8-bits multiplexed format (D1, CCIR656); SAV/EAV included.
handbook, full pagewidth
Y(UV)
UV
LLC
CREF
HREF
1997 Jun 13
SAA8110G
(OUTPUTS
CLOCKED
AT
CLK2)
Y(UV)
UV
Y7 to Y0
UV7 to UV0
LLC
CREF
HREF
VSYNCOUT
FIOUT
HOST
Y0
Y1
Y2
Y3
Y4
Y5
Y6
U0
V0
U2
V2
U4
V4
U6
sample moment
Fig.15 16-bits multiplexed format (DTV2, CCIR601).
14
MGK166