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VP513 View Datasheet(PDF) - SANYO -> Panasonic

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VP513 Datasheet PDF : 8 Pages
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VP513
VP513 Thermal Design Example
Conditions: Using an fH = 64 kHz class monitor, fv = 70 MHz (clock)
VCC = 80 V, VBB = 10 V, VOUT = 50 Vp-p (CL = 10 pF)
Since this class of monitor can be operated up to Ta = 60°C, here we consider the case where the maximum clock
frequency is 70 MHz.
As mentioned previously, the chips with the largest loss are transistors Tr3 and Tr4. Determining those values gives:
Pc (Tr3) = 3.7 × 0.25 = 0.93 [W] ............................................................ (5)
We determine Tj by substituting the value for θj-c in equation (5).
Tj = 0.93 × 35 = 32.6 [°C] .................................................................... (6)
Here, Tc(max) (measured at the back surface) will be under 100°C, and the value in item (6) above shows that it suffices
to focus on Tc(max) < 100°C in the thermal design to fulfill the Tj(max) < 150°C and Tc(max) < 100°C conditions.
Therefore, a heat sink that maintains the Tc < 100°C condition will have the following thermal resistance:
θh = Tc ÷ Pd (TOTAL) = (Tc – Ta) ÷ [Pd (1CH) × 3]
= 40 ÷ (3.7 × 3) = 3.6°C/W
Thus the thermal resistance in this case is θh = 3.6 °C/W.
In actual practice, the ambient temperature and operating conditions will allow a heat sink smaller than that indicated by
this calculation to be used. Therefore, design optimization taking the actual conditions into account is also required.
Surge Protection
Surge protection is required when this device is connected to a CRT. This product requires the same protection as earlier
products.
1. Termination spark gap
2. Surge suppression resistor (Recommended value: 33 to 68 )
3. Surge suppression diode (Installed in the vicinity of the IC output pin.)
Note: Caution: The value of surge suppression resistors must be determined taking both the stipulated discharge test and
the required frequency bandwidth into account.
No. 5331-6/8

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