SAA4952WP View Datasheet(PDF) - Philips Electronics
Part Name
Description
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SAA4952WP Datasheet PDF : 32 Pages
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Philips Semiconductors
Memory controller
Objective specification
SAA4952WP
Internal registers
Table 1 Vertical display related pulses
ADDRESS
(HEX)
40
41
42
43
44
45
46
47
53
54
55
62
63
REGISTER
FUNCTION
VDFLSTA(1) start of VDFL pulse (only 8-bit)
VDFLSTO(1) stop of VDFL pulse (only 8-bit)
VWE2STA(2) start of vertical write enable 2 (lower 8 of 9 bits)
VWE2STO(2) stop of vertical write enable 2 (lower 8 of 9 bits)
VRE2STA(2) start of vertical read enable 2 (lower 8 of 9 bits)
VRE2STO(2) stop of vertical read enable 2 (lower 8 of 9 bits)
VRE1STA(2) start of vertical read enable 1 (lower 8 of 9 bits)
VRE1STO(2) stop of vertical read enable 1 (lower 8 of 9 bits)
VDSTA(2) start of vertical display signal (lower 8 of 9 bits)
VDSTO(2) stop of vertical display signal (lower 8 of 9 bits)
VDMSB(2) bit 0: MSB of VRE1STA
bit 1: MSB of VRE1STO
bit 2: MSB of VWE2STA
bit 3: MSB of VWE2STO
bit 4: MSB of VRE2STA
bit 5: MSB of VRE2STO
bit 6: MSB of VDSTA
bit 7: MSB of VDSTO
SETFIELD1(1) field length to be set by the microcontroller in the generator mode (lower 8 of 10 bits);
bit 0 = LSB
SETFIELD2(1) field length to be set by the microcontroller in the generator mode;
bit 0: bit 8 of field length
bit 1: bit 9 of field length (MSB)
Notes
1. VDFLSTA, VDFLSTO, SETFIELD1 and SETFIELD2 are programmable in increments of half lines (16 µs/32 µs).
2. The memory control signals VWE2, VRE1 and VRE2 as well as VD can be changed in steps of one display line.
1997 Jun 10
8
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