MAX512 View Datasheet(PDF) - Maxim Integrated
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MAX512 Datasheet PDF : 16 Pages
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Low-Cost, Triple, 8-Bit Voltage-Output DACs
with Serial Interface
_____________________________Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
TIME EXITING SHUTDOWN MODE
OUTPUT VOLTAGE NOISE DC TO 1MHz
A
OUTA,
B
200µV/div
20µs/div
VDD = 3V, VSS = 0V, REFAB = VDD, RL = 1k Ω, CL = 0.1µF
DAC LOADED WITH ALL 1s
A: CS, 2V/div
B: OUTA, 1V/div
2ms/div
DIGITAL CODE = 80, REFAB = VDD, NO LOAD
______________________________________________________________Pin Description
PIN
NAME
FUNCTION
1
DIN
Serial Data Input of the 16-bit shift register. Data is clocked into the register on the rising edge of SCLK.
2
–C—S–
CarheipexSeecleuctet d(aacttitvheeloriwsi)n.gEendabgleesofd–Ca—tS–a. to be shifted into the 16-bit shift register. Programming commands
3
SCLK
Serial Clock Input. Data is clocked in on the rising edge of SCLK.
4
–R—E—S—E—T–
Asynchronous reset input (active low). Clears all registers to their default state (FFhex for DAC A and
DAC B registers); all other registers are reset to 0 (including the input shift register).
5
VDD
Positive Power Supply (2.7V to 5.5V). Bypass with 0.22µF to GND.
6
GND
Ground
7
VSS
Negative Power Supply 0V or (-1.5V to -5.5V). Tie to GND for single supply operation. If a negative supply
is applied, bypass with 0.22µF to GND.
8
OUTA
DAC A Output Voltage (Buffered). Resets to full scale. Connect 0.1µF capacitor or greater to GND.
9
OUTB
DAC B Output Voltage (Buffered). Resets to full scale. Connect 0.01µF capacitor or greater to GND.
10
OUTC
DAC C Output Voltage (Unbuffered). Resets to zero.
11
REFC
DAC C Reference Voltage
12
REFAB
DAC A/B Reference Voltage
13
I.C.
Internally connected. Do not make connections to this pin.
14
LOUT
Logic Output (latched)
8 _______________________________________________________________________________________
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