ISL97645A View Datasheet(PDF) - Intersil
Part Name
Description
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ISL97645A Datasheet PDF : 15 Pages
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ISL97645A
Vin
UVLO
Threshold
0
VGH
RESET
VDPM
1.215V
VFLK
VGH_M
VGH
VGL
Power on delay time is
controlled by CDPM
Slope is controlled
by RE
Delay tim e is
controlled by CE
VGH_M is forced to
VGH when RESET
goes to low AND
V G H > 2 .5 V
VIN
x
>VLOR
x
>VLOR
x
FIGURE 17. GATE PULSE MODULATOR TIMING DIAGRAM
VDPM
x
<1.215V
<1.215V
>1.215V
x
TABLE 6. VGH_M STATUS TABLE
RESET
VGH
x
<2.5V
x
High
High
>2.5V
>2.5V
>2.5V
Low
>2.5V
VGH_M
GROUND
GROUND
GROUND
Switching
controlled by
VFLK
VGH
COMMENT
Will be grounded if VIN is above
a logic threshold. Could occur at
power up or power down
Startup only condition:If either
VIN> VLOR or reset is H, but
VDPM < 1.215V, GND VGHM
Power down state. Could occur
at power up if part starts with
VGH > 2.5V
Start-Up Sequence
When VIN exceeds VLOR and ENABLE reaches the VIH
threshold value, Boost converter starts up, and gate pulse
modulator circuit output holds until VDPM is charged to
1.215V. Note that there is a DC path in the boost converter
from the input to the output through the inductor and diode,
hence the input voltage will be seen at output with a forward
voltage drop of diode before the part is enabled. If this
voltage is not desired, the following circuit can be inserted
between input and inductor to disconnect the DC path when
the part is disabled.
.
TO INDUCTOR
INPUT
ENABLE
FIGURE 18. CIRCUIT TO DISCONNECT THE DC PATH OF
BOOST CONVERTER
13
FN6353.0
July 2, 2007
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