M27V405 View Datasheet(PDF) - STMicroelectronics
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M27V405 Datasheet PDF : 13 Pages
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M27V405
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70°C, –20 to 70°C, –20 to 85°C or –40 to 85°C; VCC = 3.3V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
Min
Max
ILI
Input Leakage Current
0V ≤ VIN ≤ VCC
±10
ILO Output Leakage Current
0V ≤ VOUT ≤ VCC
±10
ICC Supply Current
E = VIL, G = VIL, IOUT = 0mA,
15
f = 5MHz, VCC ≤ 3.6V
ICC1 Supply Current (Standby) TTL
E = VIH
1
ICC2 Supply Current (Standby) CMOS
E > VCC – 0.2V, VCC ≤ 3.6V
20
IPP Program Current
VPP = VCC
10
VIL Input Low Voltage
–0.3
0.8
VIH (2) Input High Voltage
2
VOL Output Low Voltage
IOL = 2.1mA
Output High Voltage TTL
VOH
Output High Voltage CMOS
IOH = –400µA
IOH = –100µA
2.4
VCC – 0.7V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
VCC + 1
0.4
Unit
µA
µA
mA
mA
µA
µA
V
V
V
V
V
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70°C, –20 to 70°C, –20 to 85°C or –40 to 85°C; VCC = 3.3V ± 10%; VPP = VCC)
M27V405
Symbol Alt
Parameter
Test Condition
-120
-150
Unit
Min
Max Min Max
tAVQV
tACC Address Valid to Output Valid
E = VIL, G = VIL
120
150 ns
tELQV
tCE Chip Enable Low to Output Valid
G = VIL
120
150 ns
tGLQV
tOE Output Enable Low to Output Valid
E = VIL
60
80 ns
tEHQZ (2) tDF Chip Enable High to Output Hi-Z
G = VIL
0
50
0 50 ns
tGHQZ (2) tDF Output Enable High to Output Hi-Z
E = VIL
0
50
0 50 ns
tAXQX
tOH
Address Transition to Output
Transition
E = VIL, G = VIL
0
0
ns
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
by the falling and rising edges of E. The magnitude
of the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
5/13
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