EDS1232AATA-75MI View Datasheet(PDF) - Elpida Memory, Inc

Part Name

Description

View to exact match

EDS1232AATA-75MI

128M bits SDRAM WTR (Wide Temperature Range)

Elpida Memory, Inc 

EDS1232AATA-MI

Write command to Precharge command interval (same bank)

When the precharge command is executed for the same bank as the write command that preceded it, the minimum

interval between the two commands is 1 clock. However, if the burst write operation is unfinished, the input data

must be masked by means of DQM for assurance of the clock defined by tDPL.

CLK

Command

DQM

WRIT

PRE/PALL

DQ

in A0

in A1

in A2

E tDPL

WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To stop write operation))

OCLK

Command

LDQM

WRIT

PRE/PALL

DQ

in A0

in A1

in A2

in A3

tDPL

Product WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To write all data))

Data Sheet E0340E30 (Ver. 3.0)

39

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