CS5165GDWR16 View Datasheet(PDF) - Cherry semiconductor

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CS5165GDWR16

Fast, Precise 5-Bit Synchronous Buck Controller for the Next Generation Low Voltage Pentium® II Processors

Cherry semiconductor 

Application Information: continued

threshold, the GateH output is activated, and the Soft Start

Capacitor begins charging. The GateH output will remain

on, enabling the NFET switch, until terminated by either

the PWM Comparator, or the Maximum On-Time Timer.

If the Maximum On-Time is exceeded before the regulator

output voltage achieves the 1V level, the pulse is terminat-

ed. The GateH pin drives low, and the GateL pin drives

high for the duration of the Extended Off-Time. This time

is set by the Time-out Timer and is approximately equal to

the Maximum On-Time, resulting in a 50% Duty Cycle. The

GateL Pin will then drive low, the GateH pin will drive

high, and the cycle repeats.

When regulator output voltage achieves the 1V level pre-

sent at the Comp pin, regulation has been achieved and

normal Off-Time will ensue. The PWM comparator termi-

nates the switch On-Time, with Off-Time set by the COFF

Capacitor. The V2™ control loop will adjust switch Duty

Cycle as required to ensure the regulator output voltage

tracks the output of the Error Amp.

The Soft Start and Comp capacitors will charge to their

final levels, providing a controlled turn-on of the regulator

output. Regulator turn-on time is determined by the Comp

capacitor charging to its final value. Its voltage is limited

by the Soft Start Comp clamp and the voltage on the Soft

start pin.

Trace 1 Soft Start pin (2V/div)

Trace 2 COMP pin (error amplifier output) (1V/div)

Trace 4 Regulator output voltage (1V/div)

Figure 3: Demonstration board start up waveforms.

Power Supply Sequencing

The CS5165 offers inherent protection from undefined

start-up conditions, regardless of the 12V and 5V supply

power-up sequencing. The turn-on slew rates of the 12V

and 5V power supplies can be varied over wide ranges

without affecting the output voltage or causing detrimental

effects to the buck regulator.

Trace 1 - Regulator Output Voltage (1V/div.)

Trace 2 - Inductor Switching Node (5V/div.)

Trace 1 - Regulator Output Voltage (1V/div.)

Trace 2 - Inductor Switching Node (2V/div.)

Trace 3 - 12V input (VCC) (5V/div.)

Trace 4 - 5V Input (1V/div.)

Figure 2: Demonstration board start up in response to increasing 12V

and 5V input voltages. Extended off time is followed by normal off

time operation when output voltage achieves regulation to the error

amplifier output.

Figure 4: Demonstration board enable start up waveforms.

Normal Operation

During Normal operation, Switch Off-Time is constant and

set by the COFF capacitor. Switch On-Time is adjusted by

the V2™ Control loop to maintain regulation. This results

in changes in regulator switching frequency, duty cycle,

and output ripple in response to changes in load and line.

Output voltage ripple will be determined by inductor rip-

ple current and the ESR of the output capacitors (see fig-

ures 5 & 6 ).

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