ATMEGA169PA-MCUR View Datasheet(PDF) - Atmel Corporation

Part Name

Description

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ATMEGA169PA-MCUR

8-bit Microcontroller with 16K Bytes In-System Programmable Flash

Atmel Corporation 

ATmega169PA

7.6 Register Description

7.6.1 EEARH and EEARL – EEPROM Address Register

7.6.2

Bit

0x22 (0x42)

0x21 (0x41)

Read/Write

Initial Value

15

–

EEAR7

7

R

R/W

0

X

14

–

EEAR6

6

R

R/W

0

X

13

–

EEAR5

5

R

R/W

0

X

12

–

EEAR4

4

R

R/W

0

X

11

–

EEAR3

3

R

R/W

0

X

10

–

EEAR2

2

R

R/W

0

X

9

–

EEAR1

1

R

R/W

0

X

8

EEAR8

EEAR0

0

R/W

R/W

X

X

EEARH

EEARL

• Bits 15:9 – Res: Reserved Bits

These bits are reserved and will always read as zero.

• Bits 8:0 – EEAR8:0: EEPROM Address

The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the

512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and

511. The initial value of EEAR is undefined. A proper value must be written before the EEPROM

may be accessed.

EEDR – EEPROM Data Register

7.6.3

Bit

0x20 (0x40)

Read/Write

Initial Value

7

6

5

4

3

2

1

0

MSB

LSB

EEDR

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

0

0

0

0

0

0

0

0

• Bits 7:0 – EEDR7:0: EEPROM Data

For the EEPROM write operation, the EEDR Register contains the data to be written to the

EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the

EEDR contains the data read out from the EEPROM at the address given by EEAR.

EECR – EEPROM Control Register

Bit

7

6

5

4

3

2

1

0

0x1F (0x3F)

–

–

–

–

EERIE EEMWE EEWE

EERE

EECR

Read/Write

R

R

R

R

R/W

R/W

R/W

R/W

Initial Value

0

0

0

0

0

0

X

0

• Bits 7..4 – Res: Reserved Bits

These bits are reserved and will always read as zero.

• Bit 3 – EERIE: EEPROM Ready Interrupt Enable

Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing

EERIE to zero disables the interrupt. The EEPROM Ready interrupt generates a constant inter-

rupt when EEWE is cleared.

• Bit 2 – EEMWE: EEPROM Master Write Enable

The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written.

When EEMWE is set, setting EEWE within four clock cycles will write data to the EEPROM at

27

8171B–AVR–03/10

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