CHAPTER 2 OUTLINE (µPD780078Y SUBSERIES)
2.2 Features
• Minimum instruction execution time changeable from high speed (0.238 µs: @ 8.38 MHz operation with main
system clock) to ultra-low speed (122 µs: @ 32.768 kHz operation with subsystem clock)
• General-purpose registers: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
• Internal memory
Part Number
µPD780076Y
µPD780078Y
µPD78F0078Y
Type
Program Memory
(ROM)
Mask ROM 48 KB
60 KB
Flash memory 60 KBNote
Data Memory
High-Speed RAM
Expansion RAM
1024 bytes
1024 bytes
Note The capacity of the internal flash memory can be changed by means of the memory size switching register
(IMS).
• External memory expansion space: 64 KB (on-chip external device expansion function)
• Instruction set suited to system control
• Bit manipulation possible in all address spaces
• Multiply and divide instructions
• 52 I/O ports: (Four N-ch open-drain ports)
• Timer: 6 channels
• 16-bit timer/event counter: 2 channels
• 8-bit timer/event counter: 2 channels
• Watch timer:
1 channel
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• Watchdog timer:
• Serial interface:
1 channel
4 channels
• 3-wire serial mode:
1 channel
• UART mode:
1 channel
• 3-wire serial I/O/UART mode selectable: 1 channel
• I2C mode:
1 channel
• 10-bit resolution A/D converter: 8 channels
• Vectored interrupt sources: 26
• Two types of on-chip clock oscillators (main system clock and subsystem clock)
• Power supply voltage: VDD = 1.8 to 5.5 V
30
User’s Manual U14260EJ3V1UD
Datasheet pdf - http://www.DataSheet4U.co.kr/