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SST89V516RD2-33-C-TQJE View Datasheet(PDF) - Microchip Technology

Part Name
Description
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SST89V516RD2-33-C-TQJE
Microchip
Microchip Technology Microchip
SST89V516RD2-33-C-TQJE Datasheet PDF : 94 Pages
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FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
Product Description
Data Sheet
The SST89E516RDx and SST89V516RDx are members of the FlashFlex family of 8-bit microcon-
troller products designed and manufactured with SST’s patented and proprietary SuperFlash CMOS
semiconductor process technology. The split-gate cell design and thick-oxide tunneling injector offer
significant cost and reliability benefits for SST’s customers. The devices use the 8051 instruction set
and are pin-for-pin compatible with standard 8051 microcontroller devices.
The devices come with 72 KByte of on-chip flash EEPROM program memory which is partitioned into
2 independent program memory blocks. The primary Block 0 occupies 64 KByte of internal program
memory space and the secondary Block 1 occupies 8 KByte of internal program memory space.
The 8-KByte secondary block can be mapped to the lowest location of the 64 KByte address space; it
can also be hidden from the program counter and used as an independent EEPROM-like data mem-
ory.
In addition to the 72 KByte of EEPROM program memory on-chip and 1024 x8 bits of on-chip RAM,
the devices can address up to 64 KByte of external program memory and up to 64 KByte of external
RAM.
The flash memory blocks can be programmed via a standard 87C5x OTP EPROM programmer fitted
with a special adapter and the firmware for SST’s devices. During power-on reset, the devices can be
configured as either a slave to an external host for source code storage or a master to an external host
for an in-application programming (IAP) operation. The devices are designed to be programmed in-
system and in-application on the printed circuit board for maximum flexibility. The devices are pre-pro-
grammed with an example of the bootstrap loader in the memory, demonstrating the initial user pro-
gram code loading or subsequent user code updating via the IAP operation. The sample bootstrap
loader is available for the user’s reference and convenience only; SST does not guarantee its function-
ality or usefulness. Chip-Erase or Block-Erase operations will erase the pre-programmed sample code.
©2013 Silicon Storage Technology, Inc.
2
DS25093B
02/13

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