CS51311GDR14 View Datasheet(PDF) - Cherry semiconductor

Part Name

Description

View to exact match

CS51311GDR14

Synchronous CPU Buck Controller for 12V and 5V Applications

Cherry semiconductor 

Absolute Maximum Ratings

Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Lead Temperature Soldering

Reflow (SMD styles only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 sec. max above 183°C, 230°C peak

Storage Temperature Range, TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65° to 150°C

ESD Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV

Pin Symbol

VCC

Pin Name

IC Power Input

COMP

VFB, VOUT, VID0-4

COFF

GATE(H), GATE(L)

Compensation Pin

Voltage Feedback Input, Output

Voltage Sense Pin, Voltage

ID DAC Inputs

Off-Time Pin

High-Side, Low-Side FET Drivers

PWRGD

Gnd

Power-Good Output

Ground

VMAX

16V

6V

6V

VMIN

-0.3V

-0.3V

-0.3V

ISOURCE

N/A

1mA

1mA

ISINK

1.5 APeak

200mA DC

5mA

1mA

6V

-0.3V

1mA

50mA

16V -0.3V DC 1.5APeak 1.5A Peak

200mA DC 200mA DC

6V

-0.3V

1mA

30mA

0V

0V

1.5A Peak

N/A

200mA DC

PACKAGE PIN #

1,2,3,4,5

6

7

8

9

10

11

12

13

14

Package Pin Description

PIN SYMBOL

VIDO – VID4

VFB

VOUT

VCC

GATE(H)

Gnd

GATE(L)

PWRGD

COFF

COMP

FUNCTION

Voltage ID DAC inputs. These pins are internally pulled up to

5.65V if left open. VID4 selects the DAC range. When VID4 is

high (logic one), the Error Amp reference range is 2.125V to

3.525V with 100mV increments. When VID4 is low (logic zero),

the Error amp reference voltage is 1.325V to 2.075V with 50mV

increments.

Error amp inverting input, PWM comparator non-inverting

input, current limit comparator non-inverting input, PWRGD

comparator input.

Current limit comparator inverting input.

Input power supply pin for the internal circuitry.

Decouple with filter capacitor to Gnd.

High side switch FET driver pin .

Ground pin.

Low side synchronous FET driver pin.

Power-Good Output. Open collector output drives low when

VFB is out of regulation.

Off-Time Capacitor Pin. A capacitor from this pin to Gnd sets

the off time for the regulator

Error amp output. PWM comparator inverting input.

A capacitor on this pin provides error amp compensation.

2

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