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X9400WV24I 数据手册 ( 数据表 ) - Intersil

X9400 image

零件编号
X9400WV24I

Other PDF
  2006  

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21 Pages

File Size
370.4 kB

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Intersil
Intersil 

DESCRIPTION
   The X9400 integrates four digitally controlled potentiometers (XDCPs) on a monolithic CMOS integrated circuit.
   The digitally controlled potentiometer is implemented using 63 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the SPI serial bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and four nonvolatile Data Registers (DR0-3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array through the switches. Power-up recalls the contents of DR0 to the WCR.

FEATURES
• Four potentiometers per package
• 64 resistor taps
• SPI serial interface for write, read, and transfer
   operations of the potentiometer
• Wiper resistance, 40Ω typical at 5V.
• Four non-volatile data registers for each
   potentiometer
• Non-volatile storage of multiple wiper position
• Power-on recall. Loads saved wiper position on
   power-up.
• Standby current < 1µA max
• System VCC: 2.7V to 5.5V operation
• Analog V+/V–: -5V to +5V
• 10kΩ, 2.5kΩ End to end resistance
• 100 yr. data retention
• Endurance: 100,000 data changes per bit per
   register
• Low power CMOS
• 24-lead SOIC and 24-lead TSSOP


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