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NB2304AI2DG 数据手册 ( 数据表 ) - ON Semiconductor

NB2304A image

零件编号
NB2304AI2DG

产品描述 (功能)

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  2010  

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The NB2304A is a versatile, 3.3 V zero delay buffer designed to distribute high−speed clocks in PC, workstation, datacom, telecom and other high−performance applications. It is available in an 8 pin package. The part has an on−chip PLL which locks to an input clock presented on the REF pin. The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs. The input−to−output propagation delay is guaranteed to be less than 250 ps, and the output−to−output skew is guaranteed to be less than 200 ps.


FEATUREs
• Zero Input − Output Propagation Delay, Adjustable by Capacitive Load on FBK Input
• Multiple Configurations − Refer to NB2304A Configurations Table
• Input Frequency Range: 15 MHz to 133 MHz
• Multiple Low−Skew Outputs
• Output−Output Skew < 200 ps
• Device−Device Skew < 500 ps
• Two Banks of Four Outputs
• Less than 200 ps Cycle−to−Cycle Jitter (−1, −1H, −5H)
• Available in Space Saving, 8 pin 150 mil SOIC Package
• 3.3 V Operation
• Advanced 0.35μ CMOS Technology
• Industrial Temperature Available
• These are Pb−Free Devices

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零件编号
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