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MC100ELT23DR2 数据手册 ( 数据表 ) - ON Semiconductor

MC100ELT23 image

零件编号
MC100ELT23DR2

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ON Semiconductor 

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal.
The PECL inputs are differential; therefore, the MC100ELT23 can accept any standard differential PECL input referenced from a VCC of 5.0 V.

• 3.5 ns Typical Propagation Delay
• 24 mA TTL Outputs
• Flow Through Pinouts
• ESD Protection: >2 KV HBM, > 400 V MM
• The 100 Series Contains Temperature Compensation
• Operating Range VCC= 4.75 V to 5.25 V with GND= 0 V
• Internal Input Pulldown Resistors
• Q Output Will Default High with Inputs Left Open or < 1.3 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
   For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”, Oxygen Index 28 to 34
• Transistor Count = 91 devices

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