
Sharp Electronics
FUNCTIONAL DESCRIPTION
The LH5496/96H are dual port memories with internal addressing to implement a First-In, First-Out algorithm. Through an advanced dual port architecture, they provide fully asynchronous read/write operation. Empty, Full, and Half-Full status flags are provided to prevent data overflow and underflow. In addition, internal logic provides for unlimited expansion in both word size and depth.
FEATURES
• Fast Access Times: 15 */20/25/35/50/65/80 ns
• Full CMOS Dual Port Memory Array
• Fully Asynchronous Read and Write
• Expandable-in Width and Depth
• Full, Half-Full, and Empty Status Flags
• Read Retransmit Capability
• TTL Compatible I/O
• Packages:
28-Pin, 300-mil PDIP
28-Pin, 600-mil PDIP
32-Pin PLCC
• Pin and Functionally Compatible with IDT7201