Description
The GAL20V8Z and GAL20V8ZD, at 100 µA standby current and 12ns propagation delay provides the highest speed and lowest power combination PLD available in the market. The GAL20V8Z/ZD is manufactured using Lattice Semiconductor's ad vanced zero power E2CMOS process, which combines CMOS with Electrically Erasable (E2) floating gate technology.

FEATUREs
• ZERO POWER E2CMOS TECHNOLOGY
   — 100µA Standby Current
   — Input Transition Detection on GAL20V8Z
   — Dedicated Power-down Pin on GAL20V8ZD
   — Input and Output Latching During Power Down
• HIGH PERFORMANCE E2CMOS TECHNOLOGY
   — 12 ns Maximum Propagation Delay
   — Fmax = 83.3 MHz
   — 8 ns Maximum from Clock Input to Data Output
   — TTL Compatible 16 mA Output Drive
   — UltraMOS® Advanced CMOS Technology
• E2 CELL TECHNOLOGY
   — Reconfigurable Logic
   — Reprogrammable Cells
   — 100% Tested/100% Yields
   — High Speed Electrical Erasure (<100ms)
   — 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
   — Maximum Flexibility for Complex Logic Designs
   — Programmable Output Polarity
   — Architecturally Similar to Standard GAL20V8
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
   — 100% Functional Testability
• APPLICATIONS INCLUDE:
   — Battery Powered Systems
   — DMA Control
   — State Machine Control
   — High Speed Graphics Processing
• ELECTRONIC SIGNATURE FOR IDENTIFICATION