DISTINCTIVE CHARACTERISTICS
■ Single power supply operation
— 2.7 to 3.6 V for read, program, and erase operations
— Ideal for battery-powered applications
■ Manufactured on 0.35 µm process technology
■ High performance
— 90 or 120 ns access time
■ Low power consumption (typical values at 5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 7 mA read current
— 15 mA program/erase current
■ Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
A hardware method of locking a sector to prevent any program or erase operations within that sector
Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors
■ Unlock Bypass Program Command
— Reduces overall programming time when issuing multiple program command sequences
■ Top or bottom boot block configurations available
■ Embedded Algorithms
— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors
— Embedded Program algorithm automatically writes and verifies data at specified addresses
■ Minimum 1,000,000 write cycle guarantee per sector
■ Compatibility with JEDEC standards
— Pinout and software compatible with single power supply Flash
— Superior inadvertent write protection
■ Data# Polling and toggle bits
— Provides a software method of detecting program or erase operation completion
■ Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or erase cycle completion
■ Erase Suspend/Erase Resume
— Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation
■ Hardware reset pin (RESET#)
— Hardware method to reset the device to reading array data