
STMicroelectronics
DESCRIPTION
The 74V1T126 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
3-STATE control input G has to be set LOW to place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
ICC =1 µA (MAX.) at TA = 25 °C
■ COMPATIBLEWITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V(MAX)
■ POWERDOWN PROTECTIONON INPUT
■ SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
■ BALANCEDPROPAGATIONDELAYS:
tPLH = tPHL
■ OPERATING VOLTAGERANGE:
VCC (OPR)= 4.5V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY